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FROMLIST: arm64: dts: qcom: shikra: Add Support for usb0 and usb1 on shikra QLI - #1739

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FROMLIST: arm64: dts: qcom: shikra: Add Support for usb0 and usb1 on shikra QLI#1739
akakum-qualcomm wants to merge 4 commits into
qualcomm-linux:early/hwe/shikra/dtfrom
akakum-qualcomm:usb/shikra-ccg

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Added changes in shikra-cqm-evk, shikra-cqs-evk, and shikra-iqs-evk which
now use the upstream CYPD6129/CYPD6229 UCSI Type-C controller for USB
role switching (via &i2c3/typec@40) instead of the previous PM4125-native
typec block, while shikra.dtsi/shikra-evk.dtsi gain the base usb_1/usb_2
dwc3, USB HS/QMP PHY, and QUSB2 efuse-trim nodes needed to support them.

All four affected board/SoC DT files were rebuilt with dtc
(qcom/shikra-cqm-evk.dtb, qcom/shikra-cqs-evk.dtb, qcom/shikra-iqs-evk.dtb)
with no warnings or errors.

Diffstat (base..HEAD):
 .../devicetree/bindings/usb/cypress,cypd6129.yaml  | 107 ++++++++
 arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts        |  94 ++++++-
 arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi       |  13 +-
 arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts        |  94 ++++++-
 arch/arm64/boot/dts/qcom/shikra-evk.dtsi           |  12 +
 arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts        | 124 ++++++++++
 arch/arm64/boot/dts/qcom/shikra.dtsi               | 274 ++++++++++++++-----
 drivers/usb/typec/ucsi/ucsi_ccg.c                  |   2 +
 8 files changed, 600 insertions(+), 120 deletions(-)

Link: https://lore.kernel.org/all/20260811-usb-shikra-v7-v7-0-753e928f37ae@oss.qualcomm.com/
      https://lore.kernel.org/all/20260821-shikra-usb-dt-v7-apply-v2-0-628885fc1d0e@oss.qualcomm.com/
Signed-off-by: Akash Kumar [akash.kumar@oss.qualcomm.com](mailto:akash.kumar@oss.qualcomm.com)

CRs-Fixed: 4652998
CRs-Fixed:: 4635219

@akakum-qualcomm
akakum-qualcomm force-pushed the usb/shikra-ccg branch 2 times, most recently from 8842052 to ed44d34 Compare August 28, 2026 08:52
…shikra QLI

Added changes in shikra-cqm-evk, shikra-cqs-evk, and shikra-iqs-evk which
now use the upstream CYPD6129/CYPD6229 UCSI Type-C controller for USB
role switching (via &i2c3/typec@40) instead of the previous PM4125-native
typec block, while shikra.dtsi/shikra-evk.dtsi gain the base usb_1/usb_2
dwc3, USB HS/QMP PHY, and QUSB2 efuse-trim nodes needed to support them.

All four affected board/SoC DT files were rebuilt with dtc
(qcom/shikra-cqm-evk.dtb, qcom/shikra-cqs-evk.dtb, qcom/shikra-iqs-evk.dtb)
with no warnings or errors.

Diffstat (base..HEAD):
 .../devicetree/bindings/usb/cypress,cypd6129.yaml  | 107 ++++++++
 arch/arm64/boot/dts/qcom/shikra-cqm-evk.dts        |  94 ++++++-
 arch/arm64/boot/dts/qcom/shikra-cqm-som.dtsi       |  13 +-
 arch/arm64/boot/dts/qcom/shikra-cqs-evk.dts        |  94 ++++++-
 arch/arm64/boot/dts/qcom/shikra-evk.dtsi           |  12 +
 arch/arm64/boot/dts/qcom/shikra-iqs-evk.dts        | 124 ++++++++++
 arch/arm64/boot/dts/qcom/shikra.dtsi               | 274 ++++++++++++++-----
 drivers/usb/typec/ucsi/ucsi_ccg.c                  |   2 +
 8 files changed, 600 insertions(+), 120 deletions(-)

Link: https://lore.kernel.org/all/20260811-usb-shikra-v7-v7-0-753e928f37ae@oss.qualcomm.com/
      https://lore.kernel.org/all/20260821-shikra-usb-dt-v7-apply-v2-0-628885fc1d0e@oss.qualcomm.com/
Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com>
…oups

The Shikra GPIO PINGROUP macro configures intr_target_bit but never
sets intr_target_width, leaving it at its zero-initialized default.
Set it to 4 to match the width of the interrupt target field.

Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com>
Signed-off-by: Akash Kumar <akakum@qti.qualcomm.com>
Add .cyacd2 firmware flashing support to the CCG UCSI driver, and
trigger it automatically from probe when the device reports no
usable firmware version.

Parsing and flashing:
 - Parse both .cyacd2 and .cyacd firmware text formats (ccg_parse_cyacd2_text,
   ccg_parse_cyacd_text), auto-detecting the format from file content
   (ccg_content_is_cyacd2_text), and convert relative/bank-based rows into
   absolute flash row addresses (ccg_rows_to_absolute, ccg_parse_and_build_rows).
 - Add HPIv2 register access helpers (ccg_hpi_read16/write16, ccg_i2c_read,
   ccg_read_u16/u32) and flash primitives (ccg_cmd_write_flash_row,
   ccg_cmd_read_flash_row, ccg_cmd_validate_fw, ccg_cmd_reset,
   ccg_cmd_jump_boot_mode, ccg_enter_flashing_robust) needed to write firmware
   rows and validate/reset the device afterwards.
 - Detect hybrid flash layout and derive per-bank row ranges
   (ccg_is_hybrid, ccg_row_size_from_device_mode, remap_rows_to_bank),
   and add response/async-event draining and wait helpers
   (ccg_wait_success, ccg_wait_async_event, ccg_drain_responses,
   ccg_disable_pd_ports) to keep the flashing sequence in sync with the
   device.
 - Rework do_flash() to request the firmware image, parse it into
   absolute rows, enter flashing mode, write and validate the image, and
   reset the device, with diagnostic logging of parsed rows and readback
   for bring-up.
 - Add a "ccg_fw_file" module parameter to override the firmware file
   name used for flashing, for bring-up/testing.

Probe-time update:
 - When get_fw_info() reports an empty/zero uc->fw_version at probe
   time, call ccg_fw_update_needed()/ccg_fw_update() to flash the
   device before creating/registering the UCSI interface, instead of
   requiring a manual "echo 1 > do_flash" after boot.
 - Re-run ucsi_ccg_init() and get_fw_info() after a probe-time flash
   since do_flash() resets the device, so the correct post-flash
   firmware version is used for the rest of probe.

Existing behavior kept:
 - The "do_flash" sysfs attribute (do_flash_store -> ccg_update_firmware
   work item) is unchanged and still available to trigger a flash after
   the driver has loaded.

Signed-off-by: Akash Kumar <akakum@qti.qualcomm.com>
…able

Add a gpio-hog for GPIO 79 (BOOST_5V) on the Shikra CQM/CQS/IQS EVK
boards. This line enables the level translator that is otherwise
left disabled by default, which is required in the industrial
configuration.

Also fix the Shikra USB3-DP combo PHY (qcom,shikra-qmp-usb3-dp-phy)
which had no matching driver entry, causing the DWC3 USB controller
to fail probing with a deferred-probe cascade (typec, USB, and
several sync_state() consumers). Add the missing of_device_id entry
and a Shikra-specific PHY config that also deasserts the third GCC
reset line present on Shikra's PHY node but absent from the shared
QCS615 config, which was leaving part of the PHY held in reset and
causing PHY init to time out (-ETIMEDOUT).

CRs-Fixed: 4652998
CRs-Fixed: 4635219
Signed-off-by: Akash Kumar <akash.kumar@oss.qualcomm.com>
Signed-off-by: Akash Kumar <akakum@qti.qualcomm.com>
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3 participants